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College of Electrical & Mechanical Engineering  (CEME)
Dr. Nazar Abbas Saqib
Department of Computer & Software Engineering

National University of Sciences and Technology (NUST)
College of EME, Peshawar Road Rawalpindi
Tel : +92-51-9278050-4108

Information Security/ Low Power & High Speed Embedded System Design

Ph.D (Electrical Engineering)

​Research Areas:

Design and Development: Reconfigurable computing, VLSI design techniques, System-on-Chip designs, FPGAs based System Design (low area, low power, high speed)

Information Security (Computer, Network & Communication Security)

Cryptology (Security algorithms, security protocols, security attacks)


​ Publications


  1. Francisco Rodríguez-Henríquez, Nazar A. Saqib, Arturo Díaz-Pérez, and Cetin Kaya Koc, Cryptographic Algorithms on Reconfigurable Hardware, ISBN: 0387338837, Springer New York, USA , Nov 2006

Book Chapter:

  1. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez, A Generic Coprocessor For Elliptic Curve Scalar Multiplication on Hardware, Embedded Cryptographic Hardware: Design and Security, Chapter 11, ISBN: 1-59454-145-0, Nova Science Publishers New York, 2004.

Journal Publications:

  1. Francisco Rodríguez-Henríquez, Guillermo Morales-Luna, Nazar A. Saqib and Nareli Cruz-Cortés, "Parallel Itoh-Tsujii Multiplicative Inversion Algorithm for a Special Class of Trinomials",  Designs, Codes and Cryptography, 45(1): 19-37 (2007), Springer.

  2. F. Rodríguez-Henríquez, N. A. Saqib , and A. Díaz-Pérez, A Fast Parallel Implementation of Elliptic Curve Point Multiplication over GF(2m), Elsevier Journal of Microprocessor and Microsystems 28 (2004) 329-339

  3. F. Rodríguez-Henríquez, N. A. Saqib , and A. Díaz-Pérez, 4.2 Gbit/s Single-Chip FPGA Implementation of AES Algorithm, in: IEE Electronics Letters, Vol. 39, Springer-Verlag Berlin Heidelberg 2003, 2003, pp. 1115-1116.

  4. Nazar Abbas Saqib,  Complexity Analysis for 4-Input/1-Output FPGAs Applied to Multiplier Designs, Scalable Computing: Practice and Experience (International Journal for Parallel and Distributed Computing), pages 411–422, Volume 8, no. 4, December 2007

  5. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez,  A Reconfigurable Processor for High Speed Point Multiplication in Elliptic Curves, International Journal of Embedded Systems, Special Issue on Advances in Reconfigurable Architectures, pages 237-249, Volume 1 - Issue 3/4 – 2005

Conference Publications:

  1. S. Zerafshan Gober, Barkha Javed, Nazar Abbas Saqib, “Covert Channel Detection: A Survey Based Analysis”, IEEE HONET 2013, Istanbul Turkey, pp 57-64, 12-14 December 2012

  2. Freeha Azmat, Nazar Abbass,Sara Shakil,Sadia Rehman, "A secure, configurable and customized multimode Bulk Encryptor," IEEE Defense Science Research Conference and Expo (DSR), Singapore, pp.1-4, 3-5 Aug. 2011

  3. Abid Hussain and Nazar Abbas Saqib, "Protocol aware shot-noise based radio frequency jamming method in 802.11 networks," Eighth IEEE International Conference on Wireless and Optical Communications Networks (WOCN), France,  pp.1-6, 24-26 May 2011

  4. Sidra Malik and Nazar Abbas Saqib, Adaptive filtering for noisy and mismatched conditions in speaker recognition," IEEE International Conference on Signal and Image Processing Applications (ICSIPA), Kuala Lumpur, Malaysia, pp.162-167, 16-18 Nov. 2011

  5. Imadud Din and Nazar Abbas Saqib, An Empirical Analysis of the Effect of RTT Delay on End User Quality of Experience, proceedings of 19th IEEE International Conference on Computer Communications and Networks (ICCCN 2010), Switzerland, PP 1-6, August 2–5, 2010

  6. Imad-ud-Din and Nazar Abbas Saqib, Passive Packet Loss Detection and its Effect on Web Traffic Characteristics, International Conference on Computer and Electrical Engineering (ICCEE) 2008, IEEE Computer Society Press, Page(s): 729-733, 2008

  7. Imadud Din , Nazar Abbas Saqib and Adeel Baig, Passive Analysis of Web Traffic Characteristics for Estimating Quality of Experience; IEEE GLOBECOM 2008. Page(s): 1-5, New Orleans, LA, USA, November 30, 2008

  8. Francisco Rodríguez-Henríquez, Guillermo Morales-Luna, Nazar A. Saqib and Nareli Cruz-Cortés, "A Parallel Version of the Itoh-Tsujii Multiplicative Inversion Algorithm", International Workshop on Applied Reconfigurable Computing ARC 2007, Lecture Notes in Computer Science, Río de Janeiro, Brazil 2007

  9. Francisco Rodríguez-Henríquez, Nazar A. Saqib, and Nareli Cruz –Cortez, A Fast Implementation of Multiplicative Inversion over GF(2m), ITCC 2005: IEEE Computer Society, pp. 574-579, April 11-13, 2005

  10. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez, Sequential and Pipelined Architecures for AES Implementation, IASTED International Conferenc on Computer Science and Technology, May 19-21, 2003, Cancun, Mexico, pp. 159-163, IASTED/ACTA Press, 2003

  11. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez, Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core, FPL 2003, Lecture Notes in Computer Science 2778, pp. 303-312, Springer-Verlag Berlin Heidelberg 2003

  12. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez, AES Algorithm Implementation-An efficient Approach for Sequential and Pipeline Architecures, Fourth Mexican International Conference on Computer Science , Sep. 8-12, 2003, Tlaxcala, Mexico, pp. 126-130, IEEE Computer Society Press, 2003

  13. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Perez, A Parallel Architecture for Fast Computation of Elliptic Curve Scalar Multiplication over GF(2m), in Proceedings of 18th International Parallel & Distributed Processing Symposium (RAW2004), IEEE Computer Society Press, Santa Fe, New Mexico, p. 144-154

  14. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez, A Parallel Architecture for Computing Scalar Multiplication on Hessian Elliptic Curves, in: International Symposium on Information Technology (ITCC 2004), IEEE Computer Society Press, Las Vegas (NV), USA, 2004, pp. 546-552

  15. Arturo Díaz-Pérez, Nazar A. Saqib and, and Francisco Rodríguez-Henríquez, ”Highly Optimized Single-Chip FPGA Implementations of AES Encryption and Decryption Cores”. In: X Workshop IBERCHIP, IWS-2004, 10-12 de Marzo de 2004, Cartagena de Indias, Colombia

  16. Nazar A. Saqib, Francisco Rodríguez-Henríquez, and Arturo Díaz-Pérez, A Compact and Efficient FPGA Implementation of the DES Algorithm, International Conference on Reconfigurable Computing and FPGAs (ReConFig04), Mexican Society for Computer Sciences, Colima, Mexico, 2004

  17. A. Díaz-Pérez, N. A. Saqib, F. Rodríguez-Henríquez, Some Guidelines for Implementing Symmetric-Key Cryptosystems on Reconfigurable-Hardware, IV Jornada de Computación Reconfigurable y Aplicaciones (JCRA), Barcelona, Spain, September 13-15, 2004.

DESIGNATION​ ​FROM​ TO​​ University / Institute​​
​Associate Professor ​2013 ​Date ​​NUST College of EME
​​Assistant Professor ​​2005 2013
FPGAs based design
Advanced Computer Networks
​Computer Network Security
​Cryptography and Security Mechanisms
​Secure Communication System Design

DESIGNATION​ ​FROM​ TO​​ Organization
Senior Scientific Officer 1992 ​2000 Public Works Organization