Dr. Imran Hafeez Abbasi
Avionics Engineering Department
National University of Sciences and Technology (NUST)
College of Aeronautical Engineering, PAF Academy, Risalpur
Embedded System Security, Information Security, Formal Methods, Machine Learning
PhD (Electrical Engineering),SEECS, NUST, Pakistan MS (Information Security), MCS, NUST, Pakistan
Dr. Imran Hafeez Abbasi is serving as Associate Professor at the Department of Avionics Engineering, CAE, NUST. He completed his undergraduate studies from CAE Risalpur in 2002, in the specialty of Avionics engineering. He holds a Masters degree in Information Security and a PhD degree in Embedded Systems Security both from NUST. His industrial experience spans over more than 10 years, during which he designed and developed diverse range of avionics systems for combat and transport aircrafts. He also possesses maintenance experience of communication and electronic warfare equipment at operational and depot levels.
Primary research interests includes:
- Embedded Systems Design
- IoTs Design and Security
- Formal Methods
- Embedded Systems Security
- Cryptography & Cryptanalysis
- Machine Learning
security, cryptography, machine learning, formal verification and embedded
- I. Abbassi, F. Khalid, O. Hasan, A. Kamboh and M. Shafique, McSeVIC : A Model Checking Based Formal Framework for Security VulnerabilityAnalysis of Integrated Circuits", IEEE Access (IF=4.098),Vol. 6, pp. 32240 - 32257, 2018.
- I. Abbassi, F. Khalid, O. Hasan and A. Kamboh, Using Gate-LevelSide Channel Parameters for Formally Analyzing Vulnerabilities in IntegratedCircuits", Science of Computer Programming (IF=1.088), Elseiver,Vol. 171, pp. 42-66, 2019.
- F. Khalid, I. Abbassi, S. Rehman, A. Kamboh, O. Hasan and M.Shafique, ForASec : Formal Analysis of Security Vulnerabilities in SequentialCircuits", CoRR abs/1812.05446, 2018. [https://arxiv.org/abs/1812.05446].
- Imran Hafeez Abbassi, Faiq Khalid, Semeen Rehman, Awais Mehmood Kamboh, Axel Jantsch, Siddharth Garg, Muhammad Shafique, “TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint. Design, Automation and Test in Europe (DATE), 25-29 March, 2019, Florence, Italy, 2019 IEEE/ACM ( pp. 914-919).
- F. Khalid, I. Abbassi, O. Hasan and S. Hasan, “A Self-Learningframework to detect Intruded Integrated Circuits", IEEE InternationalSymposium on Circuits and Systems (ISCAS-2016), Montreal, Canada,2016, IEEE (pp. 1702-1705).
- W. Ahmad, I. Abbassi, U. Sanwal and H. Mahmood, “Accelerating Viterbi Algorithm using Custom Instruction Approach”, IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications (MESA), Oulu, Finland, 2018, IEEE (pp. 1-7).
- Abbassi, I, and Afzal, M., "A Compact S-Box design for SMS4 Block Cipher." International Workshop on Security and Application for Embedded Systems ITCS (2011),Springer LNEE, vol 107 (pp. 641-658).
- I. Abbassi, F. Khalid, A. Kamboh and O. Hasan, Formal Verification of Gate-Level Multiple Side Channel Parameters to detect Hardware Trojans,Formal Techniques for Safety Critical Systems (Springer, Cham, 2017), ISBN 978-3-319-53945-4,doi 10.1007/978-3-319-53946-1_5.
Circuit Analysis, Embedded Systems, VLSI Design, Machine learning,
Digital System Design
- October 2013 – February 2015: Maintenance engineer for Communication and Avionics Systems
- September 2011 – October 2013: Senior Design Engineer (Aircraft Integration) at R&D wing, Peshawar
- June 2003 – October 2009: Design Engineer at R&D wing, Peshawar